Gameboy Uber Cart
4-3-09: Lots of progress has been made on the Ubercart project. The cart can boot some games. The
hardware is mostly working with only a few minor wires and bugs.
1-23-09: PCB arrives. These things look nice. See pictures below.
1-19-09: PCB is ordered and is scheduled to be in on Friday.
1-7-09: All parts arive and are test fit on the layout. The board is now ready to be ordered!!
1-2-09: All parts ordered.
The micro has the job of interfacing with the SD card to access files and maintaining the file system. It
communcates with the FPGA over an 8-bit data address bus. It also loads the FPGA over the FPGAs Passive
serial bus. The image for the FPGA is currently stored on the microSD cart but will eventually be moved
to the micros flash to allow for faster loading. It currently takes around 6 seconds to load the FPGA. The
micro also controls the reset line to the GB to allow for rebooting of the GB once a ROM has been loaded. I am
sure there is a software method to do this but the toggling of an IO pin is so much eaiser. The micro is an
LPC2138 from NXP running at 60MHz. The LPC2138 has a massive 512KB of Flash and 32KB of RAM which provides
lots of flexability.
The microSD Card
The microSD card contains the ROMs and the FPGAs configuration file. For the most part the microSD has worked as
advertised. The only problems arose as a result of a blunder in the layout. The two blue wires are to shift the
last two pins on the connector over by one. Ops... The original microSD connecter that I was going to use had
a different pinout then the one that I ordered forcing a last second change in the layout. The SD card is currently
running happily at 8MHz in SPI mode with a FAT16 file system. The FAT16 code was optained from the SparkFun mp3
The FPGA is really the heart of the entire cart. It is responsible for controlling the SDRAM, memroy bank
controller emulation, GB/SDRAM interfaceing and memory mapping in general. The FPGA is an EP2C6T144C7 which is
in Cyclone II product line from Altera. The FPGA is a bit overkill for what it really needs to do but I needed the
extra IO of the larger part. The FPGA currently emulates MBC1 and MBC5 as well as remapping the SDRAM map to allow
implementing a Menu in the last 64KB of ram.
The SDRAM is realy the business end of the cart. It contains the ROM and SRAM during game play. The
SDRAM is a MT48LC16M8A2P-75 from Micron. The SDRAM is 128Mbit or 16MBx8. The max cart size for the gameboy
color is 8MB so I needed at least 9MB for SRAM emulation an what not so 16MB was the next step up. Bellow
is what the memory map of the SDRAM currently looks like. There are areas fromthe ROM, SRAM, Menu Engine and
Size: 64Mbit or 8MBx8
Purpose: Maps to the GB ROM section. In the GB it is divided into 512 16kB banks.
Size: Mbit or 128kBx8
Purpose: Maps to the GB RAM section. In the GB it is divided into 16 8kB banks.
Purpose: Unused currently
Size: 256kbit or 32kBx8
Purpose: ROM section used to hold the Menu when the GB first boots.
Size: 256kbit or 32kBx8
Purpose: Ram section used by the menu to hold the game titles.
The Buffers and GB edge connector
The buffers allow the cart to interface with the 5V GB. All of the electronics run at 3.3V. The
edge connector provides the connection from the cart to the GB. The scratches on the edge connector
show how nice a lined up the card is with the GBs connector.
Cart installed in a GB color
This is what the fulled populated board looks like when it is installed in teh GB color.
Here is a nice image of the PCB front.
Here is a nice image of the PCB back.
In order to make the PCB fit properly into the GB I had to cut it down horizontally about .25". I also
had to shave a little of the connector side to mate up to the GB cart properly.
PCB Matted with GB
Here is the PCB all lined up and matting properly with the GB edge connector.
I started out by creating the FRAM cart that allowed me to run custom code on. That gave me the itch to create
somthing bigger. I wanted to be able to play an unlimited amount of programs on the same cart. This is the story
of the journey that is taking place for the quest for the "UBER CART".
The Basic Idea
This is the block diagram for the Uber Cart. It will be comprised of an FPGA to interface the GB with the SDRAM,
an LPC2138 to interface the microSD to the GB and a 128MBit SDRAM that will hold the games during play. The FPGA will
be program using the Passive Serial interface. The micro will load the FPGA file from the microSD card before
initializing the FPGA. Since the FPGA will take longer to load then the GB, I had to come up with a way to force
the GB to reset. This was easy enough as the reset line of the GB comes to the cart edge connector. A simple transistor
to ground and the GB can be held in reset until the system is stable.
The Circuit Card
As I wanted this cart to fit in the GB cart slot I decided to create a circuit board for the design. It is
longer the GB slot but that is not that critical. Unfortunatly the origonal GB cart circuit cards are about
half the thickness of most cheaply availiable comercial board houses. So the circuit card will not be fitting
make into a GB cartridge case. :( The J3 connector in the upper right hand corner is the microSD slot. The
edge connector can be seen on the left hand side. The big U9 in the middle is the 144 pin TQFP FPGA. U7 on the
bottom is the SDRAM. U8 on the bottom right is the LPC2138.
STAY TUNED FOR MORE ACTION!!
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